State Machine Diagram - Pseudostate Notations

This section describes Pseudostate Notations used in a UML State Machine Diagram. Pseudostate Notations presents some logic nodes to build a complex transition from one state to another state.

Pseudostate Notations are graphical notations used in a UML State Machine Diagram to represent some logic notes to build a complex transition from one state to another state.

The following Pseudostate Notations are supported:

The following picture shows some examples of Pseudostate Notations in a UML State Machine diagram:
UML Notation Shape - Pseudostates

Last update: 2014.

Table of Contents

 About This UML Tutorial Book

 Introduction of UML (Unified Model Language)

 UML Class Diagram and Notations

 UML Activity Diagram and Notations

 UML Sequence Diagram and Notations

UML State Machine Diagram and Notations

 What Is a State Machine Diagram?

 State Machine Diagram - State Notation

State Machine Diagram - Pseudostate Notations

 State Machine Diagram - Transition Notation

 State Machine Diagram - Transition Sequence Notations

 UML Use Case Diagram and Notations

 MS Visio 2010 - UML Drawing Tool

 References

 PDF Printing Version